An exploration into adaptive methods for decreasing wear-leveling in SCM
Storage Class Memories (SCM) have recently emerged as promising technologies for use as system memory because of their advantages such as non-volatility, byte addressability and low idle power usage. Nevertheless, lower write endurance, higher asymmetric read/write latencies, and stronger consistency requirements pose new challenges for using SCM rather than DRAM as the next generation of memory. In this report, we focus on endurance challenges in SCM. More specifically, we challenge traditional simplified wear-leveling methods like Flip-N-Write by exploring the merits of adapting to data sets dynamically. In the process, we develop a novel method for improving wear leveling on SCM: Adaptive Bit Flip Pattern Learning (ABFPL). We show that our method works best in software rather than as a hardware implementation since it allows for more adaptability to changing workloads. We provide and demonstrate a preliminary configuration which can improve wear in a larger set of datasets than previous approaches. We evaluate our method and show it to have up to a improvement of 57% over Flip-N-Write.
Storage Class Memories
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