Optimizing Systems for Byte-Addressable NVM by Reducing Bit Flipping

Appeared in 17th USENIX Conference on File and Storage Technologies.


New byte-addressable non-volatile memory (BNVM) technologies such as phase change memory (PCM) enable the construction of systems with large persistent memories, improving reliability and potentially reducing power consumption. However, BNVM technologies only support a limited number of lifetime writes per cell, and consume most of their power when flipping a bit’s state during a write; thus, PCM controllers only rewrite a cell’s contents when the cell’s value has changed. Prior research has assumed that reducing the number of words written is a good proxy for reducing the number of bits modified, but a recent study has suggested that this assumption may not be valid. Our research confirms that approaches with the fewest writes often have more bit flips than those optimized to reduce bit flipping. To test the effectiveness of bit flip reduction, we developed a framework that uses the number of bits flipped over time as the measure of “goodness”, and modified a cycle-accurate simulator to track the number of bits flipped during program execution. We then implemented several modifications to common data structures that reduce power consumption and increase memory lifetime by reducing the number of bits modified by operations on several common data structures: linked lists, hash tables, and red-black trees. We were able to reduce the number of bits flipped by up to 72% over standard implementations of the same data structures. We also measured the number of bit flips generated by memory allocation and stack frame saves, and found that careful data placement in the stack can reduce bit flips significantly. These changes require no hardware modifications and neither significantly reduce performance nor increase code complexity, making them very attractive for systems optimized for BNVM.

Publication date:
February 2019

Daniel Bittman
Peter Alvaro
Darrell D. E. Long
Ethan L. Miller

Storage Class Memories
Storage/Energy Efficiency in IoT

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Bibtex entry

  author       = {Daniel Bittman and Peter Alvaro and Darrell D. E. Long and Ethan
L. Miller},
  title        = {Optimizing Systems for Byte-Addressable NVM by Reducing Bit
  booktitle = {17th USENIX Conference on File and Storage Technologies},
  month        = feb,
  year         = {2019},
Last modified 8 Mar 2019